Estimation of the Ic Layout Sensitivity to Spot Defects
نویسندگان
چکیده
Interactive method for optimization of an IC layout with respect to sensitivity to spot defects is presented. The relationship between occurrence of a spot defect and a circuit failure is discussed. A new concept of sensitive area is introduced. A new algorithm which allows determination of sensitive areas for opens is proposed. A practical example of the application of a software tool SENSAT to a circuit layout optimization problem is given.
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